For both IDM and Foundry, gross margins have been high for a long time. Facing this wave of global stock shortages, the overall pressure is not small for these leading companies. As for the enterprises in the back of the first camp and the enterprises in the second camp in various fields, they ushered in a rare opportunity for development and lived very comfortably in this wave of lack of core. This is most prominent in the wafer industry.
One, wafer foundry the most crazy
As the global foundry leader, TSMC has an absolute advantage in revenue level, especially since its 10nm process mass production, has been widening the gap with Samsung, which has struggled to catch up in recent years, but the gap has not shown a trend of narrowing. At the same time, TSMC's gross margins have long been high. In fact, the company's average gross margin has been steadily above 45% since 2005, when TSMC was in the middle of a period of rapid growth in revenue from the 90nm process. It was then that the corresponding chip manufacturing began to shift from 8-inch wafers to 12-inch wafers. Today, The transition is almost complete (advanced process, of course; the transition from mature process chips to 12-inch wafers began in recent years).
Currently, TSMC's gross margin is around 50%, which is already a high level after the company invested heavily in 5nm, 3nm and 2nm processes in recent years. But even in the face of a global core shortage, TSMC's recent years, and the scale and intensity of subsequent investment, have put a lot of pressure on earnings, especially gross margins. As the leader of the high-tech semiconductor industry, it is very dangerous to maintain high gross margins, not only for the FABS, but also for IDM and Fabless.
Looking at TSMC's second-quarter results, revenue was NT $372.15 billion, up 2.7 percent q/Q and 19.8 percent y/y, gross margin was 50 percent, down 2.4 percentage points Q/Q and 3 percentage points y/y, and earnings ratio was 39.1 percent, down 2.4 percentage points Q/Q and 3.1 percentage points y/y. By process, TSMC's 5nm shipments accounted for 18 percent of wafer sales in the second quarter, compared with 31 percent for 7nm, 14 percent for 16nm and 11 percent for 28nm.
It can be seen that TSMC's revenue level is still strong, but the gross margin and profit margin both declined quarter-on-quarter and year-over-year. Of course, the decline is not large, but it must have caused the company's attention. In addition, TSMC's advanced 5nm and 7nm processes, which have been mass-produced, account for the highest proportion of revenue, which is in line with its logic of high investment in the most advanced processes. High investment naturally leads to high output. It is believed that the same situation will be the case after 3nm and 2nm production in the next few years.
However, advanced process revenue is only one aspect, gross margin must also keep up, otherwise profitability will decline, which is obviously not in line with the purpose and logic of high investment. In the fourth quarter of 2020, TSMC's gross margin reached a new high of 54%, which has been declining quarter by quarter this year. Although it is still 50%, most capital markets hope it can be above 50%. And the above mentioned second quarter gross margin sequential and year-on-year both decline, seems to knock a small alarm bell. Gross margins must remain high for the next one or two investment cycles.
For the chip manufacturing industry, the main factors that determine high gross margin are: high technology content, high capacity, high capacity utilization, and high OEM price. For TSMC, the first three factors are obviously available and the level is very high. Then, in order to maintain or improve the gross margin, another operation can be to raise the price, which is exactly what TSMC has been doing recently.
Just last week, TSMC informed customers of price increases for both advanced and mature chips, with price increases averaging around 20 per cent for advanced chips and nearly 10 per cent for mature chips.
"To ensure an appropriate ROI, both pricing and cost are important, and TSMC's pricing is strategic, not opportunistic," TSMC president Victor Wei said at the company's second quarter legal presentation. At the same time, we face the challenge of manufacturing costs as advanced processes become more complex, new investments in mature processes occur, the global manufacturing footprint expands, and the cost of raw materials and basic materials rises. We will therefore continue to work closely with our customers to deliver value and continue to negotiate with suppliers to improve costs."
"We work closely with our clients to help them succeed and at the same time get paid appropriately," Wei said in response to a question on pricing from foreign entities. Going forward, we will continue to do this by listening to our customers as much as possible to maximize growth and get an appropriate return on investment, and we are confident that our gross margin will remain around 50% or higher for the long term."
Visible, Taiwan semiconductor prices are natural.
As for TSMC's price hike, senior semiconductor industry analyst Lu Xingzhi said the price hike is actually to make up for the mismatch of capital expenditure in the past two years and save the gross margin above 50%, as TSMC lost market share in the 8-inch and 12-inch wafer mature process.
In order to improve the gross margin, it is also effective to reduce costs by reducing costs in addition to opening source. For example, TSMC recently launched the EUV Continuous Improvement Plan (CIP) for 3nm process.
The NXE: 3600D, due out later this year, costs $140 million to $150 million. Although it can process 160 12-inch wafers per hour, the increase is small compared to previous models. From the perspective of the manufacturing process, 4nm is mainly optimized at 5nm, and the EUV mask layer is about 14 layers, but 3nm will use 25 layers of EUV mask, so the foundry price of 3nm wafers may rise to 30,000 DOLLARS, which is not acceptable to all customers. In order to alleviate customers' concerns about slowing down the product line from 5nm to 3nm, TSMC launched the EUV CIP program to improve the manufacturing process by reducing the number of EUV mask layers and related materials, such as reducing the 3nm 25-layer EUV mask to 20 layers. Equipment manufacturers point out that although the chip size will be slightly increased, it will effectively reduce production costs and wafer prices, and accelerate the shift of customers' product lines to 3nm.
TSMC plans to spend usd 100 billion on capital expenditure in the next three years, 80% of which will be used to expand advanced process capacity. With the development of TSMC's advanced process to 3nm and 2nm, the proportion of EUV investment will increase significantly. If TSMC can reduce EUV purchase volume through EUV CIP program, it will help TSMC improve profitability.
Compared with TSMC, umC and SMIC, which are in the first camp of wafer foundry in the whole world, have a very impressive gross margin performance.
In the second quarter of 2021, UmC reported revenue of NT $50.91 billion, up 8.1% from the previous quarter and 14.7% year-on-year, with a gross margin of 31.3%. Umc's gross margin broke through 30%, which is a very important indicator, because the last time the company approached this figure was back to 29.16% in the fourth quarter of 2011. In the past 10 years, its gross margin mostly fluctuated between 15% and 20%, and reached 22.1% in 2020.
For SMIC, gross profit in the second quarter of 2021 was $405.0 million, up 61.9% from $250.1 million in the first quarter of 2021 and 62.9% from $248.6 million in the second quarter of 2020. Gross margin for the second quarter of 2021 was 30.1%, compared to 22.7% in the first quarter of 2021 and 26.5% in the second quarter of 2020.
Smic's gross margin of 30 per cent is also a historic moment.
In the third quarter, the company said it expected sales to rise 2 per cent to 4 per cent quarter-on-quarter and expected gross margins of 32 per cent to 34 per cent. Based on the performance of the first half of the year and the outlook of the second half of the year, on the premise of a relatively stable external environment, the company's annual sales revenue growth target and gross margin target increased to about 30%. Due to depreciation and amortization, the adverse impact of advanced processes on the company's overall gross margin is expected to decline to about five percentage points this year.
Clearly, UMC and SMIC have few of TSMC's problems when it comes to advanced processes. Although the technology of these two companies is not the most advanced, they have made the best use of total capacity, capacity utilization rate and OEM price, leading to the rapid increase of their gross profit margin. With the shortage of mature process chips, the two companies are likely to remain in the sweet spot for the next two years, with steadily rising gross margins.
Second, analog chip giants pay more attention to gross margin
Texas Instruments (TI), the world's no. 1 analog chip vendor, reported revenue of $4.076 billion in the fourth quarter of 2020, up 22% from the same period last year. Gross profit was $2,646 million, with a gross margin of approximately 65%. The annual revenue in 2020 was us $14.461 billion, up 0.54% year on year. Gross profit was $9.269 billion, gross margin was about 64%, and net profit was $5.595 billion, up 11.52% year on year.
The gross margin of 64% is very rare in the global semiconductor industry. High gross margin is actually the common denominator of high-performance analog chip manufacturers.
TI has spared no effort in improving gross margin. For these high-performance analog chip makers, they mostly use mature processes and do not need to invest heavily in advanced process fabs and related equipment, as TSMC does every year, which helps to maintain high gross margins. TI, however, has taken several steps to maintain industry-leading gross margins, not least by converting older 6 - and 8-inch fabs to 12-inch ones.
TI is an early adopter in the industry and has been doing this for years. In the past two years, the industry has seen a growing number of mature wafer fabs switch from 8-inch to 12-inch chips, mostly after a global chip shortage.
TI's profit margins have been rising over the past decade. According to TI, creating high margins is related to cutting costs by using 12-inch fabs to produce analog chips. TI's analog chips had an operating margin of 46.7% in 2018, but embedded processors had an operating margin of just 29.6%, according to the data.
TI has been steadily ramping up production of its 12-inch wafer analog chips in recent years to cut costs and improve productivity. TI says production from 12-inch fabs is 40 per cent cheaper than chips made by competitors using the 8-inch process. In addition, for analog use, the return on investment for a 12-inch fab may be higher because it can last 20 to 30 years.
TI outsources much of its logical and embedded IC production to foundries, but analog chips are mostly made in its own factories. As of 2019, the company's 12-inch analog chip production accounted for more than 50% of its overall analog chip production. Considering that the maturing and massive expansion of 5G, IoT, automotive and cloud computing applications will drive the growth of related analog chip demand, TI is also further advancing the expansion of 12-inch fabs to maintain and further improve its high margins.
ADI, the second in the analog chip industry, also has a high gross margin. Its latest quarterly financial report shows that the gross margin reached a new high of 69.43%, and the gross margin in the previous several quarters also remained at about 68%, as shown in the figure below.